1. Field of the Invention
The present invention relates to electronic display devices, and more specifically, to plasma display panel (PDP) driver circuits.
2. Description of the Prior Art
In a plasma display panel (PDP), charges are accumulated in cells according to display data, and a sustaining discharge pulse is applied to paired electrodes of the cells in order to initiate discharge glow to effect display. As far as the PDP display is concerned, a high voltage is required to be applied to the electrodes, and a pulse-duration of several microseconds is usually required. Hence the power consumption of a PDP display is considerable. Energy recovering (power saving) is therefore important. Many designs and patents have been developed for providing methods and apparatuses for energy recovery in PDPs. One example is taught in U.S. Pat. No. 5,670,974 ('974), entitled “Energy Recovery Driver for a Dot Matrix AC Plasma Display Panel with a Parallel Resonant Circuit Allowing Power Reduction” to Ohba et al., which is included herein by reference.
Please refer to FIG. 1 which illustrates a circuit diagram of a PDP driver circuit 100 according to the '947 patent. The PDP driver circuit 100 comprises an equivalent panel capacitor Cp having an X side and a Y side, four switches S1 to S4 for permitting current to pass as part of a voltage clamp circuit, and a charging/discharging circuit that includes two switches S5 and S6 with body diodes, two diodes D1 and D2, and an inductor L1. The PDP driver circuit 100 requires the two switches S5 and S6 in order to allow two-direction discharge, which is required for energy recovery. That is, the two switches S5 and S6 achieve two paths that allow ineffective power from the X side of the panel capacitor Cp to be recovered to the Y side and vice versa.
In operation, the switches S1 to S6 are controlled to provide panel capacitor Cp voltages as shown in FIG. 2. In plot 204, the individual voltages of the X side (dashed line) and Y side (solid line) of the panel capacitor Cp are shown to vary between 0 and Vs. Plot 202 shows the voltage across the panel capacitor Cp, which is the voltage of the Y side minus the voltage of the X side. The voltage across the panel capacitor Cp varies between Vs and −Vs.
The prior art suffers from several disadvantages. First, the requirement for two switches S5 and S6 increases the space required on a semiconductor integrated circuit. Second, the synchronized action the switches S5 and S6 requires increased complexity in related control circuits. And third, if only one switch fails, the circuit does not function properly. Other disadvantages and problems may also become apparent when depending on the application.